TTPCom adopts ARC's configurable CPU for 3G
January 12, 2006
ARC International announced that TTPCom, the independent supplier of digital wireless technology, has taken a license for a configurable ARC 700 core. TTPCom has incorporated an ARC 700 processor together with its proven baseband technology to develop a highly optimized system-on-chip (SoC) design for its 3G Cellular Baseband Engine (CBEmacro) product.
Embedding an ARC 700 core within the CBEmacro modem design allows TTPCom to offer a more complete modem solution. CBEmacro 3G significantly reduces engineering effort and time-to-market for semiconductor vendors developing 3G SoC solutions. Furthermore, licensees of the CBEmacro will benefit from market leading die size, power and performance.
"TTPCom's continued adoption of configurable processors demonstrates the technology's growth into applications that previously were dominated by fixed architecture microprocessors," said Derek Meyer, senior vice president of sales and marketing for ARC International. "ARC's comprehensive configurable product and Support offerings help our expanding roster of customers ensure their ARC-Based products have the competitive edge needed to increase share of high growth consumer applications."
"Since 2004 our development teams have been using ARC's configurable technology as a component of our baseband technology, creating a more efficient and less gate intensive design," said Julian Hildersley, managing director of TTPCom's Silicon Business Unit.
The Configurable ARC 700 Core Family
The configurable ARC 700 core family delivers the most power- and area-efficient 32-bit CPU and DSP processors in its performance class in a unified RISC architecture. At up to 700MHz and more than 1068 DMIPS performance in a 90 nanometer process, cores within the ARC 700 family meet the needs of the most demanding SoC applications, such as graphics, media codecs and packet processing. The 700 core family also makes an ideal platform for devices requiring high-end embedded OS's such as Linux. Standard features include DSP instructions, RTOS and secure processing support. ARC's XY Advanced DSP subsystem, Memory Management Unit and FPX floating point extensions are available options for each core.
Using ARC's patented configurable CPU technology, SoC designers can easily optimize an ARC processor for their specific applications. Features and instructions can be added or removed to achieve a highly differentiated solution that consumes less power and less silicon area, and is unique and proprietary to its creator.
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